1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to thermal interface materials and structures utilizing carbon nanotubes and methods of making the same.
2. Description of the Related Art
Many current integrated circuits are formed as multiple dice on a common wafer. After the basic process steps to form the circuits on the dice are complete, the individual die are singulated from the wafer. The singulated die are then usually mounted to structures, such as circuit boards, or packaged in some form of enclosure.
One frequently-used package consists of a substrate upon which a die is mounted. The upper surface of the substrate includes electrical interconnects. The die is manufactured with a plurality of bond pads. A collection of solder joints are provided between the bond pads of the die and the substrate interconnects to establish ohmic contact. After the die is mounted to the substrate, a lid is attached to the substrate to cover the die. Some conventional integrated circuits, such as microprocessors, generate sizeable quantities of heat that must be transferred away to avoid device shutdown or damage. The lid serves as both a protective cover and a heat transfer pathway.
To provide a heat transfer pathway from the integrated circuit to the lid, a thermal interface material is placed on the upper surface of the integrated circuit. In an ideal situation, the thermal interface material ideally fully contacts both the upper surface of the integrated circuit and the portion of the lower surface of the lid that overlies the integrated circuit. Conventional thermal interface materials include various types of pastes, and in some cases, a metal. Gel-type thermal interface materials consist of a polymeric matrix interspersed with thermally conductive particles, such as aluminum. More recently, designers have begun to turn to solder materials as a thermal interface material, particularly for high power-high temperature chips.
A solder thermal interface material like indium has favorable thermal properties that work well for high power-high temperature die. However, some solders are useful as thermal interface materials, such as indium, exhibit relatively poor adhesion to silicon. To facilitate bonding with indium, the backside of a silicon die may be provided with a metallization stack that includes a layer that readily adheres to silicon, a layer that readily wets indium and perhaps one or more intermediary barrier or other layers. An entire wafer of dice may be provided with respective metallization stacks en masse prior to dicing.
Solders used for thermal interface materials may not natively bond well with materials commonly used for package lids. Wetting layers are often applied to the applicable surface of the lid to facilitate solder bonding. Even with such wetting layers, the metallurgical bond between a conventional solder interface material and a semiconductor chip package lid can be subjected to considerable shear stresses. The chief cause of such shear stresses is mismatches in coefficients of thermal expansion between the semiconductor chip, the solder thermal interface material and the overlying lid. As the system of those three components goes through thermal cycling during testing or actual operation, the thermal interface material to lid bond undergoes cyclic shear stresses. Delamination can occur, leading to reduce thermal conduction and hot spots.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.